Apparatus and method for voltage distribution

ABSTRACT

Apparatus and methods for providing regulated voltages are disclosed. Using a single voltage regulator, a plurality of regulated voltages can be generated with a voltage distribution function. These regulated voltages can be used in a variety of applications, for example, as a bias voltage for a power amplifier. In addition, the distributed regulated voltages can implement a variety of functions, such as selectively enabling or disabling power amplifiers.

PRIORITY CLAIM

This application claims the benefit of priority under 35 U.S.C. §119(e)of U.S. Provisional Patent Application No. 61/352,330, entitled“Circuits & Systems,” filed Jun. 7, 2010, which is hereby incorporatedherein by reference in its entirety to be considered part of thisspecification.

BACKGROUND

1. Field

The disclosed technology relates to electronic systems and, inparticular, to voltage regulation in electronic systems.

2. Description of the Related Technology

Voltage regulators are electronic systems that can be used to maintainconstant voltage levels. Typically, electronic voltage regulatorscompare an output voltage to a fixed, internal reference voltage.Differences between the output voltage and the fixed, internal referencevoltage can create a negative feedback loop to reduce the voltage error.

Certain applications can require multiple accurate regulated voltages.For example, certain electronic systems require multiple accuratevoltages to bias power amplifiers. In a particular example, RF poweramplifiers can be used to boost the power of an RF signal having arelatively low power based on a bias voltage. Thereafter, the boosted RFsignal can be used for a variety of purposes, including driving theantenna of a transmitter.

Such voltage regulators can be included in a variety of electronicdevices, such as devices with wireless communication functionalities, toprovide accurate regulated voltages. For example, in mobile phoneshaving a time division multiple access (TDMA) architecture, such asthose found in Global System for Mobile Communications (GSM), codedivision multiple access (CDMA), and wideband code division multipleaccess (W-CDMA) systems, a voltage regulator can be used to bias poweramplifiers that can be used to shift power envelopes up and down withinprescribed limits of power versus time. Advantageously, theamplification of a RF signal can be managed and controlled, as aparticular mobile phone can be assigned a transmission time slot for aparticular frequency channel. Voltage regulators can be employed to aidin regulating the power level of the RF signal over time, so as toprevent signal interference from transmission during an assigned receivetime slot and/or to reduce power consumption.

There is a need for improved voltage regulators. Furthermore, there is aneed for reducing die area, current consumption, and overall designcomplexity in electronic systems. Moreover, there is a need forproviding additional flexibility for future architectural changes and/orfunctionality.

SUMMARY

The system, method, and computer-readable media described in the claimseach have several aspects, no single one of which is solely responsiblefor its desirable attributes. Without limiting the scope of thisinvention, its more prominent features will now be briefly discussed.

One aspect of the disclosure is an apparatus that includes a voltageregulator and a variable voltage distribution circuit. The voltageregulator can receive a reference voltage, a feedback signal, and apower supply voltage. Based on the received voltages, the voltageregulator can generate a regulated voltage. The variable voltagedistribution circuit can receive the regulated voltage from the voltageregulator and generate a plurality of variable regulated voltages andthe feedback signal. In some implementations, the variable voltagedistribution circuit includes a voltage distribution circuit that canprovide a plurality of regulated voltages from one regulated voltage inresponse to one or more distribution control signals. In someimplementations, the variable voltage distribution circuit also includesone or more variable voltage control elements that can selectivelycontrol at least one of the plurality of variable regulated outputvoltages in response to one or more variable voltage control signals.

According to certain implementations, the voltage regulator is alow-dropout regulator. In various implementations, the voltagedistribution circuit includes a transmission gate voltage distributionnetwork. In some implementations, at least one of the one or morevariable voltage control elements includes an element configured to varyresistance. In certain implementations, one or more of the plurality ofvariable regulated voltages are electrically connected to one or morepower amplifier bias reference input nodes.

In accordance with some implementations, the variable voltagedistribution circuit includes one or more complementary metal oxidesemiconductor circuit elements. According to a number ofimplementations, the one or more voltage distribution control signalscan represent a plurality of power modes. In certain implementations,the feedback signal is provided by a feedback loop that includes thedistribution circuit. According to several implementations, the voltagedistribution circuit provides at least one of the plurality of regulatedvoltages to the one or more variable voltage control elements. Inseveral implementations, the apparatus includes a mobile device.

Another aspect of the disclosure is a method of controlling regulatedvoltages. The method includes receiving a reference voltage and a powersupply voltage; generating a regulated voltage based at least in part onthe reference voltage and the power supply voltage; generating aplurality of regulated voltages from the reference voltage using avoltage distribution circuit; and controlling one or more of theregulated voltages using one or more variable voltage control elementsto provide one or more variable regulated voltages.

According to certain implementations, the method further includesproviding one or more variable regulated voltages to one or more poweramplifiers. A first die can include at least one variable voltagecontrol element and a second die can include at least one of the one ormore power amplifiers. Additionally, the first die and the second diecan be formed using different process technologies.

According to some implementations, generating the regulated voltage isbased on a feedback signal provided by the voltage distribution circuit.In certain implementations, two or more of the plurality of regulatedvoltages are generated concurrently. In accordance with a number ofimplementations, the method further includes receiving one or morevariable voltage control signals and using at least one of the one ormore variable voltage control signals to provide different variableregulated voltage levels corresponding to different power modes. Incertain implementations, the method further includes receiving one ormore voltage distribution control signals and using at least one of theone or more voltage distribution control signals to selectively providevariable regulated voltages to different loads for different powermodes. According to some implementations, the method further includesreceiving one or more voltage distribution control signals and using atleast one of the one or more voltage distribution control signals toselectively provide variable regulated voltages to loads in datapathsconfigured to generate signals in different frequency bands. Inaccordance with certain implementations, the one or more variablevoltage control elements receive the plurality of regulated voltagesfrom the voltage distribution circuit.

Another aspect of the disclosure is an apparatus that includes means forgenerating a regulated voltage based on a reference voltage, a feedbacksignal, and a power supply voltage. The apparatus also includes meansfor generating a plurality of variable regulated voltages and thefeedback signal based on the regulated voltage.

Yet another aspect of the disclosure is a computer-readable storagemedium including instructions that when executed perform a method of:receiving a reference voltage and a power supply voltage; generating aregulated voltage based at least in part on the reference voltage, thepower supply voltage, and a feedback loop that includes at least aportion of a voltage distribution circuit; generating a plurality ofregulated voltages from the reference voltage using the voltagedistribution circuit, controlling one or more of the regulated voltagesusing one or more variable voltage control elements to provide one ormore variable regulated voltages.

One more aspect of the disclosure is an apparatus that includes avoltage regulator and a variable voltage circuit. The voltage regulatorcan receive a reference voltage and a power supply voltage, and generatea regulated voltage based at least in part on the reference voltage andthe power supply voltage. The variable voltage circuit can receive theregulated voltage from the voltage regulator and generate at least onevariable regulated voltage. The variable voltage distribution circuitcan receive the regulated voltage from the voltage regulator andgenerate at least one variable regulated voltage. The variable voltagedistribution circuit includes one or more variable voltage controlelements that can selectively control the at least one variableregulated output voltage in response to one or more variable voltagecontrol signals

In some implementations, the voltage regulator includes a low-dropoutregulator. According to certain implementations, at least one of the oneor more variable voltage control elements includes a field effecttransistor. In accordance with a number of implementations, theapparatus includes a complementary metal oxide semiconductor integratedcircuit that includes at least one of the one or more variable voltagecontrol elements.

According to various implementations, the variable voltage circuitprovides a bias voltage to one or more power amplifiers on a separateintegrated circuit. The separate integrated circuit can include acircuit element formed with a different process technology than thevariable voltage circuit. The separate integrated circuit can include aGaAs die and the variable voltage circuit can include at least onecomplementary metal oxide semiconductor circuit element.

In accordance with some implementations, one of the at least onevariable regulated voltages is electrically connected to one or morecurrent mirrors. In certain implementations, the apparatus includes amobile device.

Yet another aspect of the disclosure is a method that includes:receiving a reference voltage and a power supply voltage; generating aregulated voltage based at least in part on the reference voltage andthe power supply voltage; and controlling the regulated voltage usingone or more variable voltage control elements to provide a variableregulated voltages.

In certain implementations, the method further includes providing thevariable regulated voltages to one or more power amplifiers. A first diecan include at least one variable voltage control element and a seconddie includes at least one of the one or more power amplifiers. The firstdie and the second die can be formed using different processtechnologies.

According to various implementations, the method further includesreceiving one or more variable voltage control signals and adjusting thevariable regulated voltage based on a power mode of the load receivingthe variable regulated voltage in response to at least one of the one ormore variable voltage control signals.

Another aspect of the disclosure is an apparatus that includes means forgenerating a regulated voltage based on a reference voltage and a powersupply voltage. The apparatus also includes means for generating avariable regulated voltage from the regulated voltage.

One more aspect of the disclosure is a computer-readable storage mediumincluding instructions that when executed perform a method of: receivinga reference voltage and a power supply voltage; generating a regulatedvoltage based at least in part on the reference voltage and the powersupply voltage; controlling the regulated voltages using one or morevariable voltage control elements to provide a variable regulatedvoltages.

Yet another aspect of the disclosure is an apparatus that includes avoltage regulator that can receive a reference voltage, a feedbacksignal, and a power supply voltage, and generate based at least in parton the received voltages a regulated voltage. The apparatus alsoincludes a voltage distribution circuit that can receive the regulatedvoltage from the voltage regulator and generate a plurality of regulatedvoltages voltage in response to one or more distribution controlsignals.

In a number of implementations, the voltage regulator includes alow-dropout regulator. According to certain implementations, the voltagedistribution circuit includes a transmission gate voltage distributionnetwork. According to some implementations, the voltage distributioncircuit includes a transmission gate voltage distribution network. Insome implementations, one or more of the plurality of regulated voltagesare electrically connected to one or more power amplifier bias referenceinput nodes. According to various implementations, the voltagedistribution circuit includes one or more silicon complementary metaloxide semiconductor circuit elements and at least one of the one or morepower amplifiers includes a different process technology. In accordancewith certain implementations, the one or more voltage distributioncontrol signals can represent a plurality of power modes. In someimplementations, the feedback signal is provided by a feedback loop thatincludes the distribution circuit. In accordance with a number ofimplementations, the apparatus includes a mobile device.

One more aspect of the disclosure is a method that includes: receiving areference voltage and a power supply voltage; generating a regulatedvoltage based at least in part on the reference voltage and the powersupply voltage; and generating a plurality of regulated voltages fromthe reference voltage using a voltage distribution circuit.

In certain implementations, the method further includes providing one ormore regulated voltages to one or more power amplifiers. A first die caninclude at least a portion of the voltage distribution circuit and asecond die can include at least one of the one or more power amplifiers.The first die and the second die can be formed using different processtechnologies.

According to some implementations, generating the regulated voltage isbased on a feedback signal provided by the voltage distribution circuit.In accordance with various implementations, two or more of the pluralityof regulated voltages are generated concurrently. In a number ofimplementations, the method further includes receiving one or morevoltage distribution control signals and using at least one of the oneor more voltage distribution control signals to selectively providevariable regulated voltages to different loads based on power modes ofthe loads. According to certain implementations, the method furtherincludes receiving one or more voltage distribution control signals andusing at least one of the one or more voltage distribution controlsignals to selectively provide variable regulated voltages to loads indata paths configured to generate signals in different frequency bands.

Yet another aspect of the disclosure is an apparatus that includes meansfor generating a regulated voltage based on a reference voltage, afeedback signal, and a power supply voltage. The apparatus also includesmeans for generating a plurality of regulated voltages and the feedbacksignal based on the regulated voltage.

And yet another aspect of the disclosure is a computer-readable storagemedium including instructions that when executed perform a method of:receiving a reference voltage and a power supply voltage; generating aregulated voltage based at least in part on the reference voltage, thepower supply voltage, and a feedback loop that includes at least aportion of a voltage distribution circuit; and generating a plurality ofregulated voltages from the reference voltage using the voltagedistribution circuit.

For purposes of summarizing the disclosure, certain aspects, advantagesand novel features of the inventions have been described herein. It isto be understood that not necessarily all such advantages may beachieved in accordance with any particular embodiment of the invention.Thus, the invention may be embodied or carried out in a manner thatachieves or optimizes one advantage or group of advantages as taughtherein without necessarily achieving other advantages as may be taughtor suggested herein.

The present disclosure relates to U.S. Pat. No. ______ [Attorney DocketSKYWRKS.061A], titled “APPARATUS AND METHOD FOR VARIABLE VOLTAGEDISTRIBUTION,” and U.S. Pat. No. ______ [Attorney Docket SKYWRKS.062A],titled “APPARATUS AND METHOD FOR VARIABLE VOLTAGE FUNCTION,” each filedon even date herewith and each hereby incorporated by reference hereinin its entirety.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 schematically depicts a power amplifier module for amplifying aradio frequency (RF) signal.

FIG. 2 schematically depicts an example wireless device that can haveone or more of the power amplifier modules of FIG. 1 configured toprovide one or more functionalities as described herein.

FIGS. 3A and 3B show example system architectures that can beimplemented in the wireless device of FIG. 2.

FIGS. 4A and 4B schematically depict an example of how an RF signal to apower amplifier can be switched ON or OFF.

FIG. 5 shows that in certain embodiments, the switch depicted in FIGS.4A and 4B can be formed as a triple-well CMOS device.

FIG. 6 shows an example configuration for operating the triple-well CMOSswitch of FIG. 5.

FIG. 7 is a block diagram of a circuit for distributing voltages from asingle voltage regulator to a plurality of power amplifiers according toone embodiment.

FIGS. 8A-8C illustrate block diagrams for distributing regulatedvoltages from a single low-dropout regulator according to certainembodiments.

FIG. 9 illustrates an embodiment of a low-dropout regulator circuit.

FIG. 10 is a block diagram of a circuit for providing a variable voltagefrom a voltage regulator a plurality of power amplifiers according toone embodiment.

FIG. 11 is a block diagram for generating a variable voltage from asingle low-dropout regulator according to one embodiment.

FIG. 12 is a block diagram of a circuit for distributing variable,regulated voltages from a single voltage regulator according to oneembodiment.

FIG. 13 is a block diagram for distributing variable voltages from asingle low-dropout regulator according to one embodiment.

FIG. 14A shows a process of providing a plurality of regulated voltagesfrom a single regulated voltage.

FIG. 14B shows a process of providing a variable regulated voltage froma single regulated voltage.

FIG. 14C shows a process of providing a plurality of variable regulatedvoltages from a single regulated voltage.

FIG. 15 illustrates an electronic system that includes a variablevoltage distribution function according to one embodiment.

DETAILED DESCRIPTION OF CERTAIN EMBODIMENTS

The following detailed description of certain embodiments presentsvarious descriptions of specific embodiments of the invention. However,the invention can be embodied in a multitude of different ways asdefined and covered by the claims. In this description, reference ismade to the drawings where like reference numerals indicate identical orfunctionally similar elements.

The headings provided herein, if any, are for convenience only and donot necessarily affect the scope or meaning of the claimed invention.

Provided herein are various non-limiting examples of devices and methodsfor facilitating amplification of a radio frequency (RF) signal. FIG. 1schematically depicts a power amplifier module (PAM) 10 that can beconfigured to achieve such an amplification of the RF signal so as toyield an output RF signal. As described herein, the power amplifiermodule can include one or more power amplifiers (PA).

FIG. 2 schematically depicts a device 11, such as a wireless device, forwhich one or more power amplifiers controlled by one or more features ofthe present disclosure can be implemented. The example wireless device11 depicted in FIG. 2 can represent a multi-band and/or multi-modedevice such as a multi-band/multi-mode mobile phone.

By way of examples, Global System for Mobile (GSM) communicationstandard is a mode of digital cellular communication that is utilized inmany parts of the world. GSM mode mobile phones can operate at one ormore of four frequency bands: 850 MHz (approximately 824-849 MHz for Tx,869-894 MHz for Rx), 900 MHz (approximately 880-915 MHz for Tx, 925-960MHz for Rx), 1800 MHz (approximately 1710-1785 MHz for Tx, 1805-1880 MHzfor Rx), 1900 MHz (approximately 1850-1910 MHz for Tx, 1930-1990 MHz forRx). Variations and/or regional/national implementations of the GSMbands are also utilized in different parts of the world.

Code division multiple access (CDMA) is another standard that can beimplemented in mobile phone devices. In certain implementations, CDMAdevices can operate in one or more of 900 MHz and 1900 MHz bands.

One or more features of the present disclosure can be implemented in theforegoing example modes and/or bands, and in other communicationstandards. For example, 3G and 4G are non-limiting examples of suchstandards.

In certain embodiments, the wireless device 11 can include a transceivercomponent 13 configured to generate RF signals for transmission via anantenna 14, and receive incoming RF signals from the antenna 14. It willbe understood that various functionalities associated with thetransmission and receiving of RF signals can be achieved by one or morecomponents that are collectively represented in FIG. 2 as thetransceiver 13. For example, a single component can be configured toprovide both transmitting and receiving functionalities. In anotherexample, transmitting and receiving functionalities can be provided byseparate components.

Similarly, it will be understood that various antenna functionalitiesassociated with the transmission and receiving of RF signals can beachieved by one or more components that are collectively represented inFIG. 2 as the antenna 14. For example, a single antenna can beconfigured to provide both transmitting and receiving functionalities.In another example, transmitting and receiving functionalities can beprovided by separate antennas. In yet another example, different bandsassociated with the wireless device 11 can be provided with one or moreantennas.

In FIG. 2, one or more output signals from the transceiver 13 aredepicted as being provided to the antenna 14 via one or moretransmission paths 15. In the example shown, different transmissionpaths 15 can represent output paths associated with different bandsand/or different power outputs. For example, two example poweramplifiers 17 shown can represent amplifications associated withdifferent power output configurations (e.g., low power output and highpower output), and/or amplifications associated with different bands.

In FIG. 2, one or more detected signals from the antenna 14 are depictedas being provided to the transceiver 13 via one or more receiving paths16. In the example shown, different receiving paths 16 can representpaths associated with different bands. For example, the four examplepaths 16 shown can represent quad-band capability that some wirelessdevices are provided with.

FIG. 2 shows that in certain embodiments, a switching component 12 canbe provided, and such a component can be configured to provide a numberof switching functionalities associated with an operation of thewireless device 11. In certain embodiments, the switching component 12can include a number of switches configured to provide functionalitiesassociated with, for example, switching between different bands,switching between different power modes, switching between transmissionand receiving modes, or some combination thereof. Various non-limitingexamples of such switches are described herein in greater detail.

FIG. 2 shows that in certain embodiments, a control component 18 can beprovided, and such a component can be configured to provide variouscontrol functionalities associated with operations of the switchingcomponent 12, the power amplifiers 17, and/or other operatingcomponent(s). Non-limiting examples of the control component 18 aredescribed herein in greater detail.

FIG. 2 shows that in certain embodiments, a processor 20 can beconfigured to facilitate implementation of various processes describedherein. For the purpose of description, embodiments of the presentdisclosure may also be described with reference to flowchartillustrations and/or block diagrams of methods, apparatus (systems) andcomputer program products. It will be understood that each block of theflowchart illustrations and/or block diagrams, and combinations ofblocks in the flowchart illustrations and/or block diagrams, may beimplemented by computer program instructions. These computer programinstructions may be provided to a processor of a general purposecomputer, special purpose computer, or other programmable dataprocessing apparatus to produce a machine, such that the instructions,which execute via the processor of the computer or other programmabledata processing apparatus, create means for implementing the actsspecified in the flowchart and/or block diagram block or blocks.

In certain embodiments, these computer program instructions may also bestored in a computer-readable memory (19 in FIG. 2) that can direct acomputer or other programmable data processing apparatus to operate in aparticular manner, such that the instructions stored in thecomputer-readable memory produce an article of manufacture includinginstruction means which implement the acts specified in the flowchartand/or block diagram block or blocks. The computer program instructionsmay also be loaded onto a computer or other programmable data processingapparatus to cause a series of operations to be performed on thecomputer or other programmable apparatus to produce a computerimplemented process such that the instructions that execute on thecomputer or other programmable apparatus provide steps for implementingthe acts specified in the flowchart and/or block diagram block orblocks.

FIGS. 3A and 3B show non-limiting examples of system architectures thatcan include one or more features of the present disclosure. For thepurpose of description, the example architectures are depicted with twoRF bands; however, it will be understood that other numbers of RF bandsare also possible. For example, system architectures having similarfunctionalities can be implemented in configurations having more thantwo bands (e.g., quad-band) or a single-band configuration.

In one example architecture 22, a first RF input indicated as “LB IN”and corresponding to a first band (e.g., a low band) can be amplified byone or more power amplifiers disposed and/or formed on a die 24 a. Suchamplified output RF signal is indicated as “LB OUT,” and can besubjected to impedance matching (e.g., to approximately 50Ω) by acomponent depicted as 30 a. Similarly, a second RF input indicated as“HB IN” and corresponding to a second band (e.g., a high band) can beamplified by one or more power amplifiers disposed and/or formed on adie 24 b. Such amplified output RF signal is indicated as “HB OUT,” andcan be subjected to impedance matching by a component depicted as 30 b(e.g., to approximately 50Ω).

In certain embodiments, amplification for a given RF band can includetwo or more amplification modes. For the example low RF band, the RFinput LB IN can be routed to a high power amplification mode or alow/medium power amplification mode via a switch depicted as 32 a. Ifthe switch 32 a is set for the high power mode, the RF signal canundergo amplification by one or more power amplifiers (e.g., by stagedamplifiers 29 a and 29 b) so as to yield a high power output. If theswitch 32 a is set for the low/medium power mode, the RF signal canundergo amplification by one or more power amplifiers.

In certain embodiments, the switch 32 a need not be employed. Forexample, the input impedance of the staged amplifiers 29 a and 30 a canbe substantially matched, and the RF input LB IN can be provided to bothstaged amplifiers 29 a and 30 a.

In the example shown, a low power mode can be achieved by utilizing apower amplifier 30 a; and a medium power mode can be achieved byamplifying the RF signal in stages by the power amplifier 30 a and asecond power amplifier 30 b. Examples of switching and routing of the RFsignals to allow selection of the low, medium and high power operatingmodes are described herein in greater detail. The low/medium amplifiedoutput RF signal can be subjected to impedance matching by a componentdepicted as 31 a prior to being output in a manner similar to that ofthe high power output signal.

Similarly, for the example high RF band, the RF input HB IN can berouted to a high power amplification mode or a low/medium poweramplification mode via a switch depicted as 32 b. If the switch 32 b isset for the high power mode, the RF signal can undergo amplification byone or more power amplifiers (e.g., by staged amplifiers 29 c and 29 d)so as to yield a high power output.

If the switch 32 b is set for the low/medium power mode, the RF signalcan undergo amplification by one or more power amplifiers. In theexample shown, a low power mode can be achieved by utilizing a poweramplifier 30 c; and a medium power mode can be achieved by amplifyingthe RF signal in stages by the power amplifier 30 c and a second poweramplifier 30 d. Examples of switching and routing of the RF signals toallow selection of the low, medium and high power operating modes aredescribed herein in greater detail. The low/medium amplified output RFsignal can be subjected to impedance matching by a component depicted as31 b prior to being output in a manner similar to that of the high poweroutput signal.

In the example architecture 22 depicted in FIG. 3A, operation of the lowand medium power modes can be facilitated by switch assemblies 27 a, 28a (for the low band) and 27 b, 28 b (for the high band). To operate in alow or medium power mode, for the low band, the switch 28 a can beclosed, and the switch 32 a can be in a state that routes the LB INsignal to the power amplifier 30 a. To operate in a medium power mode, aconnecting switch (depicted as the upper one in the switch assembly 27a) can be closed and a bypass switch (depicted as the lower one) can beopened, such that the power amplifiers 30 a and 30 b amplify the LB INsignal in stages to yield the medium power output. To operate in a lowoutput mode, the connecting switch of the switch assembly 27 a can beopened and the bypass switch of the switch assembly 27 a can be closed,such that the LB IN signal is amplified by the power amplifier 30 a bybypasses the power amplifier 30 b so as to yield the low power output.Operation of low or medium power mode for the high band can be achievedin a similar manner utilizing the switch assemblies 27 b and 28 b.

In the example configuration 22 shown in FIG. 3A, various switches(e.g., 27 a, 27 b, 28 a, 28 b) are depicted as being part of a die 23.In certain embodiments, the die 23 can also include a power amplifierbias control component 25. The PA bias control component 25 is depictedas controlling the example PAs (29 a, 29 b, 30 a, 30 b of the low bandportion, and 29 c, 29 d, 30 c, 30 d of the high band portion) via biascontrol lines depicted as 33 a and 33 b. In certain embodiments, the PAbias control component 25 can be provided with one or more input controlsignals 26 so as to facilitate one or more functionalities associatedwith various PAs as described herein.

In certain embodiments, various switches and power amplifiers associatedwith the dies depicted as 24 a, 24 b can be fabricated on substratessuch as gallium arsenide (GaAs) utilizing devices such as pseudomorphichigh electron mobility transistors (pHEMT) or bipolar field effecttransistors (BiFET). In certain embodiments, the dies depicted as 24 a,24 b in FIG. 3A can be formed on the same GaAs substrate, or on separateGaAs substrates. Further, functionalities associated with the diesdepicted as 24 a, 24 b can be formed on a single die, or on separatedies.

In certain embodiments, various switches (e.g., 27 a, 27 b, 28 a, 28 b)associated with operation of various PAs (e.g., 29 a, 29 b, 30 a, 30 bof the low band portion, and 29 c, 29 d, 30 c, 30 d of the high bandportion) can be fabricated as complementary metal-oxide-semiconductor(CMOS) devices. In certain embodiments, at least some of the PA biascontrol component 25 can be implemented on a CMOS die. In the exampleshown in FIG. 3A, the switches (e.g., 27 a, 27 b, 28 a, 28 b) and the PAbias control component 25 are depicted as being parts of the same CMOSdie 26. In certain embodiments, such switches and PA bias controlcomponent can be parts of different CMOS dies.

In certain embodiments, at least one power amplifier and one or moreswitches associated with its operation can be implemented on a CMOS die.

FIG. 3B shows an example architecture 34 that can generally providedual-band signal amplification functionalities similar to that describedin reference to FIG. 3A. In FIG. 3B, “IN 1” and “OUT 1” can representthe low band input and output LB IN and LB out; and “IN 2” and “OUT 2”can represent the high band input and output HB IN and HB OUT. Further,switching functionality associated with switches 32 a and 32 b can beprovided by switches 37 a and 37 b. For high power mode of operation,PAs 29 a, 29 b, 29 c, 29 d that are parts of dies 36 a, 36 b can besimilar to the dies 24 a, 24 b described in reference to FIG. 3A.

In FIG. 3B, power amplifiers 38 a, 38 b, 38 c, 38 d corresponding to themedium/low power modes are depicted as being formed on the same die 35(e.g., CMOS die) on which the switches (e.g., 27 a, 27 b, 28 a, 28 b)are formed. Other than these components being on the same CMOS die,operation of the example medium/low power modes can be achieved in amanner similar to those described in reference to FIG. 3A.

Similar to FIG. 3A, the example configuration 34 of FIG. 3B includes aPA bias control component 37 that is part of the example CMOS die 35.The PA bias control component 37 is depicted as receiving one or moreinput control signals 28 and controlling one or more functionalitiesassociated with the various PAs. The PAs (e.g., 29 a, 29 b for the firstband, and 29 c, 29 d for the second band) associated with the high powermode are depicted as being controlled via bias control lines 39 a and 39b. The PAs (e.g., 38 a, 38 b for the first band, and 38 c, 38 d for thesecond band) associated with the medium/low mode are depicted as beingcontrolled via bias control lines 39 c and 39 d.

It will be understood that the configurations 22 and 34 of FIGS. 3A and3B are specific examples of design architectures that can beimplemented. There are a number of other configurations that can beimplemented utilizing one or more features of the present disclosure.

In the context of switches for RF power amplifiers, FIGS. 4A and 4Bshows a switching configuration 40 that can form a basis for morecomplex architectures. In a signal path configuration 40 a of FIG. 4A,an RF signal can be routed through a first path 42 a by providing aswitch S1 that is closed. In the configuration 40 a, second path 42 b isdepicted as having a switch S2 that is open and a power amplifier. Thus,for the purpose of operating the power amplifier in the example path 42b, the configuration 40 a can represent an OFF state.

In a signal path configuration 40 b of FIG. 4B that can represent an ONstate for the power amplifier, the switch S2 on the second path 42 b isclosed and the switch S1 on the first path 42 a is open. For the purposeof description of FIGS. 4A and 4B, the first example path 42 a isdepicted without any component other than the switch S1. It will beunderstood that there may be one or more components (e.g., one or morepower amplifiers) along the first path 42 a.

In the context of power amplifiers that can be included in portableand/or wireless devices (e.g., mobile phones), a power amplifier systemcan be subjected to varying processes and operating conditions such asvoltage and temperature variations. For example, a power amplifiersystem can be powered using a variable supply voltage, such as a batteryof a mobile phone.

In certain situations, it can be important for a power amplifier systemto switch between power modes so that the power amplifier switch cancontrol power consumption. For example, in a mobile device embodiment,having a plurality of power modes allows the power amplifier to extendbattery life. Control signals, such as mode input signals received on apin or pad, can be used to indicate a desired mode of operation. Thepower amplifier system can include a plurality of RF signal pathways,which can pass through power amplification stages of varying gain.Switches can be inserted in and/or about these pathways, and switchcontrol logic can be used to enable the switches and power amplifiersassociated with the selected power amplifier RF signal pathway.

Placing a switch in a signal path of a power amplifier (e.g., in theexample signal path 42 b of FIGS. 4A and 4B) can produce a number ofeffects. For example, insertion of a switch into a RF signal pathway canresult in a loss of signal power due to radiation and resistive losses.Additionally, even a switch in an OFF state placed along an active RFsignal pathway can attenuate a RF signal. Thus, it can be important thatthe switch introduce low insertion loss in both ON and OFF states.Furthermore, it can be important that the switch be highly or acceptablylinear, so as to reduce distortion of a RF signal which passes throughthe switch. Distortion can reduce the fidelity of an RF signal; andreduction of such distortion can be important in a mobile systemembodiment.

In certain embodiments, switches can be integrated on a mixed-transistorintegrated circuit (IC) having power amplification circuitry, such as aBiFET, BiCMOS die employing silicon or GaAs technologies. Additionally,switches can be provided on a discrete die, such as a pHEMT RF switchdie, and can be configured to interface with a mixed-transistor poweramplifier die to implement a configurable power amplifier system.However, these approaches can be relatively expensive and consumesignificant amounts of area as compared to a silicon CMOS technology.Power consumption and the area of a power amplifier system can beimportant considerations, such as in mobile system applications. Thus,there is a need for employing a CMOS switch in a RF signal poweramplifier system.

In certain embodiments, CMOS RF switches can be relatively large, sothat the switch resistance in an ON-state can be relatively small so asto minimize RF insertion loss. However, large CMOS RF switches can haveundesirable parasitic components, which can cause significant leakagesand cause damage to RF signal fidelity. Additionally, the wells andactive areas of the CMOS RF switches can have associated parasitic diodeand bipolar structures. Without proper control of the wells of a CMOS RFswitch, parasitic structures may become active and increase the powerconsumption of the power amplifier system and potentially render thesystem dysfunctional. Furthermore, CMOS devices are susceptible tobreakdown, such as gate oxide breakdown, and other reliability concerns,so it can be important to properly bias a CMOS RF switch duringoperation.

In certain embodiments, one or more switches described herein can beselectively activated depending on a variety of factors, including, forexample, a power mode of the power amplifier system. For example, in ahigh power mode a CMOS RF switch may be positioned in an OFF state andconfigured to be in a shunt configuration with the active RF signalpath. The isolated P-well voltage of such a switch can be controlled toboth prevent overvoltage or other stress conditions which may endangerthe reliability, while optimizing or improving the linearity of theswitch. The linearity of the RF signal pathway having a shunt CMOSswitch in an OFF-state can be improved by keeping the isolated P-wellvoltage at a selected voltage (e.g., relatively low voltage) so as toavoid forward biasing of parasitic diode structures formed between theP-well and the N-type diffusion regions of the source and drain. Bypreventing the forward-biasing of parasitic diode structures, theinjection of unintended current into the active RF signal pathway can beavoided, thereby increasing linearity of the power amplifier system.

In certain embodiments, some or all of the foregoing example propertiescan be addressed by one or more features associated with a CMOS RFswitch, such as a switch 50 depicted in FIG. 5. The example switch 50can include a triple-well structure having an N-well 52 and a P-well 53formed on a P-type substrate 51. As shown in FIG. 5, the N-well 52 cansurround the P-well 53 so as to electrically isolate the P-well 53 fromthe substrate 51. The N-well 52 can be formed by using, for example, adeep N-well or any other suitable N-type buried layer.

The switch 50 further includes a source terminal 56 and a drain terminal59. An oxide layer 65 is disposed on the P-well 53, and a gate 58 isdisposed on top of the oxide layer 65. An N-type source diffusion regionand an N-type drain diffusion region corresponding to the source anddrain terminals (56, 59) are depicted as regions 57 and 60,respectively. In certain embodiments, formation of the triple-wellstructure and the source, drain and gate terminals thereon can beachieved in a number of known ways.

In certain operating situations, an input signal can be provided to thesource terminal 56. Whether the switch 50 allows the input signal topass to the drain terminal 59 (so as to yield an output signal) can becontrolled by application of bias voltages to the gate 58. For example,application of a first gate voltage can result in the switch 50 being inan “ON” state to allow passage of the input signal from the sourceterminal 56 to the drain terminal 59; while application of a second gatevoltage can turn the switch 50 “OFF” to substantially prevent passage ofthe input signal.

In certain embodiments, the switch 50 can include a P-well terminal 54connected to the P-well 53 by a P-type diffusion region 55. In certainembodiments, the P-type diffusion region 55 and the N-type diffusionregions 57 and 60 can be all formed substantially in the P-well 53. Incertain embodiments, the P-well terminal 54 can be provided with one ormore voltages, or held at one or more electrical potentials, tofacilitate controlling of an isolated voltage of the P-well. Examples ofsuch P-well voltages are described herein in greater detail.

In certain embodiments, the switch 50 can include an N-well terminal 61connected to the N-well 52 by an N-type diffusion region 62. In certainembodiments, the N-type diffusion region 62 can be formed substantiallyin the N-well 52. In certain embodiments, the N-well terminal 61 can beprovided with one or more voltages, or held at one or more electricalpotentials, to provide the switch 50 with one or more desired operatingperformance features. One or more examples of such N-well voltages aredescribed herein in greater detail.

In certain embodiments, the switch 50 can include a P-type substrateterminal 63 connected to the P-type substrate 51 and having a P-typediffusion region 64. In certain embodiments, the P-type diffusion region64 can be formed substantially in the P-type substrate 51. In certainembodiments, the P-type substrate terminal 63 can be provided with oneor more voltages, or held at one or more electrical potentials, toprovide the switch 50 with one or more desired operating performancefeatures. One or more examples of such N-well voltages are describedherein in greater detail.

In the example CMOS device shown in FIG. 5, the switching functionalityof the switch 50 is generally provided by an NMOS transistor defined bythe N-type diffusion regions (57, 60) in the P-well 53. FIG. 6 showsthat for such a configuration, diodes can form at p-n junctions of thetriple well structure. For example, a diode 72 can have an anode formedfrom the P-well 53, and a cathode formed from the N-type diffusionregion 57. Similarly, a diode 73 can have an anode formed from theP-well 53 and a cathode formed from the N-type diffusion region 60.Depending on the voltage of the P-well 53 relative to the voltages ofthe N-type diffusion regions 57 and 60, the diodes 72 and 73 can bebiased in, for example, a reverse bias or forward bias region ofoperation. For the purpose of description herein, bias voltages appliedto the N-type diffusion regions 57 and 60 (corresponding to the sourceand drain terminals, respectively) may or may not be the same. Further,for the purpose of description herein, a reverse bias can include aconfiguration where a voltage associated with an N-type region is equalto or greater than a voltage associated with a P-type region that formsa p-n junction with the N-type region.

In certain embodiments, the N-type diffusion regions 57 and 60 can beheld at substantially the same DC voltage. In certain embodiment, such aconfiguration can be achieved by providing a relatively large valueshunt resistor (e.g., polysilicon resistor) 75 across the source and thedrain.

In the context of triple-well CMOS devices, the N-well 52 cansubstantially isolate the P-well 53 from the P-type substrate 51. Incertain embodiments, the presence of the N-well 52 between the P-well 53and the P-type substrate 51 can result in two additional diodes. Asshown in FIG. 6, the illustrated triple well structure can include adiode 71 having an anode formed from the P-well 53 and a cathode formedfrom the N-well 52. Similarly, the triple well structure can include adiode 70 having an anode formed from the P-type substrate 51 and acathode formed from the N-well 52.

In certain embodiments, the switch 50 can be operated so as toreverse-bias one or more of the diodes shown in FIG. 6. To maintain suchreverse-biases, the source terminal, drain terminal, gate terminal,P-well terminal, N-well terminal, P-substrate terminal, or anycombination thereof, can be provided with one or more voltages, or heldat one or more electrical potentials. In certain embodiments, suchvoltages or electrical potentials can also provide one or moreadditional functionalities that can improve the performance of theswitch 50. Non-limiting examples of such performance enhancing featuresare described herein in greater detail. Although FIGS. 5 and 6 havedescribed an NMOS transistor as providing the functionality of a switch,a PMOS transistor can also be employed.

Voltage Regulation

A number of applications can require multiple accurate regulatedvoltages. For example, multiple accurate power amplifier (PA) biasvoltages can be required in the systems of FIGS. 3A, 3B, among others.As discussed above, PAs can be implemented in a number of applications,for example, mobile devices such as mobile phones. The techniquesdescribed herein that use a single voltage regulator to provide variableand/or distributed regulated voltages can result in power savings thatcan have result in numerous advantages, for example, prolonging batterylife of a mobile device. Prolonged battery life can be convenient insome circumstances and critical in others. For example, a longer batterylife can be a matter of life or death in emergency situations, such asbeing lost in the woods or trapped in a car during a snowstorm.Additionally, a longer battery life is good for the environment, as lesspower consumption helps to prevent depletion of natural resources andreduces the need for additional power generation.

One conventional approach to providing multiple accurate regulatedvoltages involves using multiple low-dropout regulators (LDOs) toregulate the voltages that are passed to each stage of a PA at eachpower mode. An LDO for each stage is typically implemented, as well asLDOs with different output voltages. Although it can be desirable tokeep current and area consumption as low as possible, these conventionalapproaches to voltage regulation can increase die area and voltagedistribution complexity. Moreover, multiple LDOs can also make suchdesigns and their respective products fail cost, area, and/or currentconsumption targets or specifications. Another conventional approach toachieve variable PA quiescent bias points is to add a bleed function tothe PA bias.

Advantageously, accurate voltages as programmed and/or controlled by auser can be distributed using a single voltage regulator, such as asingle LDO. Alternatively or additionally, each of these accuratevoltages can be selectively adjusted to a desired voltage level usingone or more variable voltage control elements. Moreover, distributionand/or variable control of regulated voltage(s) can be done in a mannerconsistent with the demanding specifications required for analogcircuits. Using a single voltage regulator instead of multiple voltageregulators can result in significant savings in die area, lower currentconsumption, and reduced design complexity. In addition, such a solutioncan provide additional flexibility for future architectural changes orfunctionality.

Further, multiple voltage references can be used to create differentquiescent bias points depending upon a desired power mode. Thespecifications in the industry for quiescent current in each power modefor the PAM can be aggressive, especially for PAs used in RFapplications. Therefore, there is a need to change the regulated voltageto some of the PA transistors depending on a chosen power mode.

Moreover, a number of process technologies can be used to implement sucha voltage regulator, including without limitation GaAs, pHEMPT, BiFET,and CMOS technologies. Although GaAs, pHEMPT, or BiFET technologies havetypically been considered more desirable technologies than CMOS forimplementing PAM RF switches and their associated data paths, voltageregulation can be implemented in CMOS according to one embodiment.Multi-mode products being introduced on the market today can requireadvanced architectures used to switch between various power modes (e.g.,high power, medium power, and low power). One such architecture isavailable in products from the Assignee of this application, SkyworksSolutions, Inc. of Woburn, Mass. With market pressure to reduce costsand maintain profitable gross margins, these architectures may becomemore cost-effective by using a lower cost technology, such as bulk ortriple-well CMOS, despite certain shortcomings. For example, using CMOSRF switches in such a hybrid application, the RF CMOS switches used aretypically very large to provide low RF insertion loss. Due to their sizeand undesirable parasitics, these switches can exhibit significantlosses and leakages. These leakages can lead to problematic and/orunintended forward active regions of operation which make entire PAMsystems dysfunctional. Therefore, a solution using CMOS that overcomessuch obstacles would be desirable.

Distribution of Regulated Voltages

FIG. 7 is a block diagram of a voltage distribution circuit 100 fordistributing regulated voltages according to one embodiment. Theillustrated voltage distribution circuit 100 includes a single voltageregulator 102, a distribution circuit 104, a control circuit 106, andPAs 108 a-108 n. The illustrated components of the distribution circuit100 can be implemented on one or more integrated circuits using one ormore semiconductor technologies. The voltage regulator 102, thedistribution circuit 104, and the control circuit can be implemented,for example, as part of the PA bias control 25 (FIG. 3A), 37 (FIG. 3B)described above. The voltage distribution circuit 100 can provide aplurality of regulated voltages Vreg[1: N] to bias power amplifiers 108a-108 n from the single voltage regulator 102. The voltage distributioncircuit 100 can implement a function to distribute a single inputreference voltage Vref_in to a plurality of regulated voltages Vreg[1:N]with the distribution circuit 104 and the control circuit 106.

The voltage regulator 102 can receive a reference voltage Vref_in, apower supply voltage, and a feedback signal Vfb as inputs and generate aregulated output voltage Vreg_out as an output. The voltage regulator102 can compare the regulated output voltage Vreg_out to the referencevoltage Vref_in and differences between the regulated output voltageVreg_out and the fixed, internal reference voltage Vref_in can create anegative feedback loop to reduce the voltage error. The regulated outputvoltage Vreg_out can have a higher voltage value than the referencevoltage Vref_in. The feedback signal Vfb can be a voltage provided bythe distribution circuit 104. The regulated output voltage Vreg_out canbe used as a stable power supply voltage, which can be independent ofload impedance, input-voltage variations, temperature, and/or time. Thevoltage regulator 102 can include an operational amplifier, transistors,resistive elements, and/or diodes to create the regulated output voltageVreg_out.

One characteristic of a voltage regulator is a dropout voltage. Thedropout voltage can represent the difference between the output voltageand the input voltage at which a voltage regulator quits regulation withfurther reductions in input voltage. A dropout voltage is typicallyconsidered to be reached when the output voltage has dropped toapproximately 100 mV below the nominal value. The dropout voltage, whichcan characterize the regulator, can depend on, for example, load currentand junction temperature of a pass transistor.

The dropout voltage can divide voltage regulators into three classes:standard regulators, quasi-LDOs, and LDOs. Standard regulators canemploy NPN pass transistors, and typically drop out at about 2 V.Quasi-LDO regulators can use a Darlington structure to implement a passdevice made up of an NPN transistor and a PNP. The dropout voltage,V_(SAT)(PNP)+V_(BE)(NPN), can typically be about 1 V. LDOs can have adropout voltage of less than about 1 V, for example, about 100 mV to 200mV. The voltage regulator 102 can include any of these types of voltageregulators.

Alternatively or additionally, voltage regulators can be defined bytheir schematic topology. As one example, LDOs can include an opencollector or an open drain topology. For example, as shown in FIG. 9,the PMOS transistor 134 has a gate connected to the output of erroramplifier 132, a source connected to Vbatt, and a drain that provides anoutput voltage Vout. Such a topology can be called an open drain circuitbecause the drain of the PMOS transistor 134 drives an output load. Anopen collector circuit is a similar topology that can use a bipolartransistor instead of a MOSFET. These topologies can enable transistorsaturation in a transistor driving an LDO output and limit the voltagedrop to the saturation drop. In contrast, an emitter follower topology(also referred to as a common collector) can include providing an outputvoltage from the emitter, in which the emitter is connected to a firstend of a resistor and a second end of the resistor is connected to apower rail or ground reference. More details regarding LDOs will beprovided later in connection with FIG. 9.

The reference voltage Vref_in can be a fixed internal reference voltagewith a known voltage value. In one embodiment, the reference voltageVref_in can be provided by a bandgap circuit, which is a circuit thatcan produce a reference voltage close to the theoretical bandgap ofsilicon at 0° K. In such an embodiment, the reference voltage Vreg_incan be around 1.25 V.

The power supply voltage Vbatt can be provided by a battery.Alternatively or additionally, the power supply voltage can be providedby any suitable source of a power supply. The power supply voltage Vbattcan provide a voltage of, for example, about 1.5 V to 9.0 V. In oneembodiment, the power supply voltage Vbatt can be provided by a lithiumion battery having a voltage of about 4.2 V when fully charged and avoltage of about 2.7 V when almost discharged. While a batterydischarges, the voltage regulator 102 can provide a constant outputvoltage Vreg_out of, for example, around 2.5 V. The power supply voltageVbatt can be an upper limit on the output voltage Vreg_out.

The distribution circuit 104 can receive the regulated output voltageVreg_out from the voltage regulator 102 and one or more distributioncontrol signals Distribution_Control from the control circuit 106. Fromthese inputs, the distribution circuit can provide the voltage regulator102 with a feedback signal Vfb and provide a plurality of PAs 108 a-108n with a plurality of regulated voltages Vreg[1:N]. Each of theregulated voltages Vreg[1:N] can be provided to one or more of the PAs108 a-108 n or individual stages of the PAs108 a-108 n. For example, inone embodiment, a PA can comprise two or more stages and two or more ofthe stages can receive different regulated voltages. From such a PA,outputs from different stages can be used for different purposes, forexample, different power modes as will be described with more detail inconnection with FIG. 15. The distribution can comprises switches, suchas transistors, or any suitable distribution elements operative todistribute accurate regulated output voltages. More detail regarding aparticular embodiment of the distribution circuit 104 will be providedin connection with FIGS. 8A-8C.

The control circuit 106 can provide the distribution circuit 104 withone or more distribution control signals Distribution_Control. Thedistribution control signals Distribution_Control can selectivelycontrol the regulated voltages Vreg[1:N] based on desired operation ofthe PAs 108 a-108 n. For example, the distribution control signalsDistribution_Control can adjust outputs of the distribution circuit 104to enable/disable certain PAs and/or based on voltage levels desired fordifferent power modes. More detail regarding particular embodiments ofthe control circuit 106 will be provided in connection with FIGS. 8A-8C.

The plurality of PAs 108 a-108 n can use the regulated voltages Vreg[1:N] as bias signals in amplifying signals for transmission. The pluralityof PAs 108 a-108 n can implement any of the PAs described above, forexample, with reference to FIGS. 2, 3A, 3B, 4A, 4B. Each of theillustrated PAs 108 a-108 n can represent one or more PAs. In addition,one or more of the PAs 108 a-108 n can include two or more stages thatcan receive different regulated voltages provided by the distributioncircuit 104. This feature is illustrated in FIG. 15.

One or more of the plurality of PAs 108 a-108 n can be implemented oneither the same integrated circuit and/or a different integrated circuitthan the distribution circuit 104 and/or the control circuit 106, forexample, as shown in FIGS. 3A and 3B. One or more of the PAs 108 a-108 ncan be implemented in a different technology than the distributioncircuit 104. For example, the distribution circuit 104 can beimplemented in a silicon CMOS technology and one or more of the PAs 108a-108 n can be implemented in, for example, GaAs pHEMPT or BiFETtechnologies. This can be advantageous because certain applications,such as PAM RF switches, can be better implemented in GaAs pHEMPT orBiFET, while the characteristics of less expensive CMOS technology canprovide the required characteristics of the distribution circuit 104.

FIGS. 8A-8C illustrate functional block diagrams for distributingregulated voltages from a single voltage regulator according to certainembodiments. Voltage distribution systems 110A, 1106, 110C illustratethree different ways of controlling voltage distribution. The voltagedistribution systems 110A, 1106, 110C each include a single LDO 112,distribution elements 114, feedback elements 116, and control circuits120, 122, 124. These systems can be used, for example, to distribute asingle regulated output voltage to each of a plurality of PA biasreferences.

The single LDO 112 is an example of the voltage regulator 102 (FIG. 7)and can implement any combination of the functionality described abovewith reference to the voltage regulator 102. The single LDO 112 can beused to provide a stable power supply voltage independent of loadimpedance, input-voltage variations, temperature, and time. As describedabove, an LDO can be defined by a dropout voltage and/or schematictopology. LDOs can have a lower dropout voltage and dissipation thanquasi-LDOs or standard voltage regulators, and thus can be moreefficient. In some embodiments, LDOs can have lower maximum inputvoltage specifications than standard voltage regulators and/or canrequire certain external capacitors to maintain stability.

LDOs can maintain voltage regulation with small differences betweensupply voltage and load voltage. For example, a lithium-ion battery candrop from about 4.2 V (fully charged) to about 2.7 V (almost discharged)and an LDO can maintain a constant voltage of approximately 2.5 V at theload. Advantageously, an LDO can be used in any equipment that needsconstant and stable voltage, while minimizing the upstream supply and/orworking with wide fluctuations in upstream supply. Typical examples ofcircuits that can receive the LDO output include without limitationcircuitry with digital or RF loads. For example, LDOs can be used inportable applications to maintain the required system voltageindependent of the state of battery charge.

The LDO 112 can be a “linear” series voltage regulator. Such voltageregulators typically include an input configured to receive a referencevoltage, a means of scaling the output voltage and comparing it to thereference, a feedback amplifier, and a series pass transistor (bipolaror FET) with a voltage drop that can be controlled by the amplifier tomaintain the output at the required value. For example, if the loadcurrent decreases, causing the output to rise incrementally, the errorvoltage can increase, the amplifier output can rise, the voltage acrossthe pass transistor can increase, and the output can return to itsoriginal value.

One or more of the PAs 108 a-108 n can be implemented in a differenttechnology than the LDO 112. For example, LDO 112 can be implemented inCMOS technology, such as bulk CMOS, and one or more of the PAs 108 a-108n can be implemented in, for example, GaAs pHEMPT or BiFET technologies.Alternatively or additionally, one or more of the PAs 108 a-108 n can beimplemented in the same technology as the LDO 112, for example, CMOS,GaAs pHEMPT, or BiFET technologies.

One embodiment of the LDO 112 is provided in FIG. 9. LDO 130 can includean error amplifier 132 and a PMOS pass transistor 134. The erroramplifier 132 and the PMOS pass transistor 134 can form avoltage-controlled current source. The error amplifier 132 can include apositive input terminal connected to Vref_in, a negative input terminal,and an output. The PMOS pass transistor 134 can include a gate, asource, and a drain. As illustrated in FIG. 9, the gate of the PMOS passtransistor 134 can be connected to the output of the error amplifier132, the source can be connected to a battery voltage Vbatt, and thedrain can provide an output voltage Vout. The output voltage Vout can beprovided to one or more loads, such as a bias input to a PA, and a highgain feedback loop. In one embodiment, the high gain feedback loop caninclude distribution elements 136. This can be advantageous because byintegrating the distribution network 136 into the LDO feedback path thecircuit can better compensate for process, temperature, and supplyvariations, and thus increase the accuracy of the regulated voltagesprovided. Accordingly, in this embodiment, the distribution elements 136may not introduce additional variation in regulated voltages provided toloads, such as PAs.

In the feedback loop, the output voltage Vout can be scaled down by thevoltage divider that includes resistors R1, R2. A first end of a firstresistor R1 can be connected to the drain of PMOS pass transistor 134. Asecond end of the first resistor R1 can be connected to the first end ofthe second resistor R2 and the positive input of the error amplifier132. The second end of the second resistor R2 can be connected toground. The first resistor R1 and the second resistor R2 can correspondto the feedback elements 116 of FIGS. 8A-8C. The values of the firstresistor R1 and the second resistor R2 can be selected to set the gainof the LDO. For example, the output voltage Vout can be represented bythe following equation:

Vout=Vref _(—) in+Vref _(—) in*R1/R2

In the embodiment shown in FIG. 9, the pass device 136 is a PMOStransistor. However, a variety of pass devices can be used in LDOs basedon a desired application. Examples of other types of pass devices caninclude without limitation NPN bipolar transistors, PNP bipolartransistors, and Darlington circuits. For a given supply voltage,bipolar pass devices can deliver the highest output current in certainembodiments. In some applications, a PNP can be preferred to an NPN,because the base of the PNP can be pulled to ground, fully saturatingthe transistor if necessary. Typically, the base of the NPN can only bepulled as high as the supply voltage, limiting the minimum voltage dropto the voltage difference between the base and the emitter V_(BE). As aresult, NPN and Darlington pass devices are typically used inapplications with dropout voltages of 1 V or more, which are nottypically considered LDO devices. Yet in other embodiments, NPN andDarlington pass devices can be used to implement dropout voltages ofLDOs. NPN and Darlington pass devices can be desirable in applicationswhere wide bandwidth and immunity to capacitive loading are necessary,as they typically have characteristically low output impedance. PMOS andPNP transistors can be effectively saturated in LDOs, thereby minimizingthe voltage loss and the power dissipated by the pass device, thusallowing low dropout, high-efficiency voltage regulators. PMOS passdevices can provide a lower dropout voltage than PNP transistors,approximately R_(Ds(ON))×I_(L) in some embodiments. PMOS pass devicescan also allow the quiescent current flow to be minimized. A typicaldrawback of using a MOS transistor is that it has been implemented as anexternal component, especially for controlling high currents. This canresult in making the IC a controller, rather than a completeself-contained regulator.

Referring back to FIGS. 8A-8C, the output Vreg_out of the single LDO 112can be provided to distribution elements 114. The distribution elements114 are one exemplary embodiment of the distribution circuit 104 (FIG.7).

The distribution elements 114 can include a transmission gate voltagedistribution network of switches. In response to signals provided by acontrol circuit 120, 122, 124, the distribution elements can selectivelyprovide regulated output voltages to a plurality of different loads byturning switches “On” or “Off.” For example, one or more of thetransmission switches can turn “On” and connect the output of the LDO112 Vreg_out to one or more of regulated output voltagesVreg_out1-Vreg_out6. Alternatively or additionally, one or more of thetransmission switches can turn “Off” and disable the connection betweenthe output of the LDO 112 Vreg_out and one or more of the regulatedoutput voltages Vreg_out1-Vreg_out6.

The distribution elements 114 can also include switches to close afeedback loop to the positive terminal of the LDO 112. Each of theswitches can connect one of the distributed regulated output voltagesVreg_out1-Vreg_out6 to the feedback elements 116, for example, the firstend of resistor R1. In one embodiment, these switches can be selectivelycontrolled to close the feedback loop when a corresponding transmissionswitch turns “On” to provide a regulated output voltage. Closing thefeedback loop can compensate for process, supply, and temperaturevariations, integrating the distribution network so that it can beincluded within a high gain feedback loop. Thus, the distributionelements 114 can reduce or minimize output voltage errors by integratingthe user-defined, digitally selected functionality within the feedbackloop for an error amplifier in LDO 112.

The distribution elements 114 can include transistors, such as MOSFETsand/or bipolar transistors. In one embodiment, the transistors can beNMOS devices. Such NMOS devices can be formed using a bulk CMOS processtechnology, for example. These devices can supply specifiedtemperature-compensated bias voltages to output loads. For example, inone embodiment, such bias voltages can be provided to the one or moreGaAs PAs on a separate die while corresponding distribution elements 114are in the “On” state and bias voltages are not supplied to one or moreunused PAs when corresponding distribution elements 114 are in the “Off”state. When distribution elements are in the “Off” state, the biasvoltages can be biased to 0 V or ground with a shunt NFET device. Insome embodiments, one or more of the regulated output voltagesVreg_out1-Vreg_out6 can be connected to a bias input of a current mirrorof a PA. The current mirror can bring the current inside the PA close tozero as the input discharges.

While six regulated output voltages are illustrated in FIGS. 8A-8C, twoor more regulated output voltages can be provided using distributionelements 114 and a single LDO 112. Considerations such as fanout, wirerouting, and/or a number of pins, for example, can limit the number ofregulated voltages provided by a single LDO 112. In one embodiment, from1 to 32 regulated output voltages can be provided by a single LDO 112.

FIGS. 8A-8C provide three different control circuits 120, 122, 124,respectively, for the distribution elements 114. These control circuitscan be implemented in the digital domain. The control circuit 106 (FIG.6) can implement any combination of the features described below inreference to FIGS. 8A-8C.

Referring to FIG. 8A, the control circuit 120 can include CMOS logic.The control circuit 120 can selectively control the distribution of theregulated voltage provided by the LDO 112 to implement a variety offunctionalities related to enabling and disabling voltage distributionincluding without limitation enabling data paths that generate signalswithin different frequency bands and enabling different modes ofoperation, such as power modes and/or controlling power of one or morePAs in specific modes of operation. N bits of logic input can beprovided to the control circuit 120. From the logic input, the controlcircuit 120 can generate a control signal for each of the distributionelements 114. In other embodiments, one or more of the distributionelements can share the same control signal. For example, thetransmission switch and feedback switch for the same regulated outputvoltage can receive the same control signal, as illustrated in FIG. 8A.As another example, transmission gates for two of the regulated outputvoltages can share the same control signal if they are enabled at thesame time. The control circuit 120 can include without limitationinverters, NAND gates, NOR gates, XOR gates, pass gates, and the like toimplement logic functions to selectively control distribution elements114. The control circuit 120 can include static CMOS logic and/ordynamic CMOS logic.

FIG. 8B provides another example control circuit 122. The controlcircuit 122 is a more specific example of the control circuit 120 andcan implement any combination of the functions for the control circuit120 described above. The control circuit 122 receives enable inputsVen_HB, Ven_LB and mode inputs Vmode0, Vmode1 and provides outputs foreach of the distribution elements 114.

The enable inputs Ven_HB, Ven_LB can selectively control thedistribution elements 114 such that regulated voltages are only providedto circuits driving certain frequency bands. This can be advantageousfor parts made for more than one application. For example, mobiledevices, such as cellular telephones, can operate in accordance withdifferent standards that operate in different frequency bands. A partthat can selectively control can different circuits that process signalswith different frequency bands can be used in multiple applications,without burning excess power from additional switching and leakagecurrent. Moreover, such parts can also be used in devices that canoperate under two or more standards operating within different frequencybands.

In one embodiment, Vreg_out1-Vreg_out3 can be provided to bias inputs ofPAs used to generate high band signals and Vreg_out4-Vreg_out6 can beprovided to bias inputs of PAs used to generate low band signals, forexample, as described later in connection with FIG. 15. For example,based on the state of Ven_HB, high band PAs can be enabled or disabledby turning one or more of the distribution elements 114 “On” or “Off.”Similarly, as another example, based on the state of Ven_LB, low bandPAs can be enabled or disabled. This idea can be applied to two or moredifferent transmission bands. Advantageously, selectively enabling anddisabling different frequency bands can result in substantial powersavings and/or reduce the need for separate voltage regulators andadditional wiring routing for each power mode.

The mode inputs can selectively control the distribution elements 114such that certain circuit elements are enabled or disabled in certainpower modes. This function can be implemented alternatively or inaddition to the band enable functionality described above. For example,the mode inputs Vmode0, Vmode1 can uniquely identify four differentpower modes, although this idea can be applied to more than fourdifferent power modes. In one embodiment, the state of the mode inputsVmode0, Vmode1 can represent a low power mode, a medium power mode, anda high power mode. In this embodiment, one or more of the regulatedoutput voltages Vreg_out1-Vreg_out6 can be provided based on the powermode. For example, the following table summarizes which regulated outputvoltages are provided via the distribution elements according to whichband is enabled and the power mode, in one embodiment.

TABLE 1 Regulated Output Voltage Band, Mode Provided High Band, HighPower Vreg_out1 High Band, Medium Power Vreg_out2, Vreg_out3 High Band,Low Power Vreg_out3 Low Band, High Power Vreg_out4 Low Band, MediumPower Vreg_out5, Vreg_out6 Low Band, Low Power Vreg_out6

FIG. 8C provides another example control circuit 124. The controlcircuit 124 includes serial peripheral interface bus (SPI) logic. Thecontrol circuit 124 receives data, latch and clock inputs and providesoutputs for each of the distribution elements 114. SPI can provide asynchronous serial data link standard that operates in full duplex mode.Devices can communicate in master/slave mode when the master deviceinitiates a data frame. A plurality of slave devices can includeindividual select lines to selectively control outputs.

Variable Control of Regulated Voltage

As discussed above, multiple voltage references can be used to createdifferent quiescent bias points depending upon specific applications.Adjusting regulated voltage from a single voltage regulated based on theneed for different reference voltages can eliminate the need foradditional voltage regulators for specific needs, such as operating in adesired power mode. At the same time, industry specifications forquiescent current in each power mode for PAMs can be aggressive,especially for PAs used in RF applications. Advantageously, regulatedvoltages can be changed to provide different quiescent currents to someof the PA bias inputs based on a chosen power mode.

FIG. 10 is a block diagram of a circuit for providing a variable voltagefrom a voltage regulator to a plurality of power amplifiers according toone embodiment. The illustrated variable voltage circuit 140 includes asingle voltage regulator 142, a distribution circuit 144, a controlcircuit 146, and one or more PAs 148. The illustrated components of thedistribution circuit 140 can be implemented on one or more integratedcircuits using one or more semiconductor technologies. The voltageregulator 142, the distribution circuit 144, and the control circuit canbe implemented, for example, as part of the PA bias control 25 (FIG.3A), 37 (FIG. 3B) described above. The voltage distribution circuit 140can provide a variable regulated voltage to bias one or more PAs 148using the single voltage regulator 142. The voltage distribution circuit140 can implement a function to adjust a single input reference voltageVref_in to a desired regulated voltage level Var_Vreg with the variablevoltage function circuit 144 and the control circuit 146.

The voltage regulator 142 can receive a reference voltage Vref_in and apower supply voltage Vbatt as inputs and generate a regulated outputvoltage Vreg_out as an output. The voltage regulator 142 can implementany combination of functions of the voltage regulator 102 (FIG. 7),except that the voltage regulator 142 does not receive feedback from avoltage distribution circuit. In addition, the voltage regulator 142 canbe used in any of the applications described above in reference to thevoltage regulator 102 (FIG. 7). In one embodiment, the voltage regulator142 can include an LDO. In such an embodiment, the voltage regulator 142can implement any combination of features described above in referenceto FIG. 9.

The variable voltage function circuit 144 can receive the regulatedoutput voltage Vreg_out from the voltage regulator 142 and one or morevariable voltage control signals from the control circuit 146. Fromthese inputs, the variable voltage function circuit 144 can adjust theregulated voltage Vreg_out provided by the voltage regulator 142 andprovide the one or more PAs 148 and/or individual stages of the PAs 148with a variable regulated voltage Var_Vreg. By providing a variablevoltage function with a single LDO, one LDO can be used to supplymultiple accurate voltage values, instead of using separate LDOs foreach voltage value. This can help to reduce current, area consumption,and overall design complexity.

The variable voltage function circuit 144 can include variable voltagecontrol elements, such as variable resistive elements. More detailregarding a particular embodiment of the variable voltage circuit 144will be provided later in reference to FIG. 11.

The control circuit 146 can provide the variable voltage functioncircuit 144 with one or more variable control signals. The variablevoltage control signal(s) can selectively control the variable regulatedvoltage Var_Reg based on desired operation of the PA 148. For example,the voltage control signal(s) can adjust outputs of the variable voltagefunction circuit 144 based on voltage levels desired for different powermodes. Thus, aggressive industry specifications for quiescent current ineach power mode for a PAM can be met using a single LDO. The variablevoltage control signal(s) can be analog or digital. The control 146circuit can be implemented in a variety of process technologies, forexample, CMOS, and in some embodiments bulk CMOS silicon technology.

The one or more PAs 148 receive the variable regulated voltage Var_Vregas bias signals in amplifying signals for transmission. The one or morePAs 148 can implement any combination of features of the poweramplifiers described above, for example, with reference to FIGS. 2, 3A,3B, 4A, 4B. Like the embodiments shown in FIGS. 3A and 3B, one or moreof PAs 148 can be implemented on either the same integrated circuitand/or a different integrated circuit than the variable voltage functioncircuit 144 and/or the control circuit 146. The one or more of the PAs148 can be implemented in a different technology than the distributioncircuit 104. For example, the variable voltage function circuit 144 canbe implemented in CMOS technology and one or more of the PAs 148 can beimplemented in, for example, GaAs pHEMPT or BiFET technologies. This canbe advantageous because certain applications, such as PAM RF switches,can be better implemented in GaAs pHEMPT or BiFET, while thecharacteristics of less expensive CMOS technology can provide therequired characteristics of the variable voltage function circuit 144.

FIG. 11 is a functional block diagram for generating a variable voltagefrom a single low-dropout regulator according to one embodiment. Thevariable voltage system 150 can include a single LDO 152, one or morevariable voltage control elements 154, and feedback elements 156. Thevariable voltage system 150 can be used, for example, to provide avariable regulated voltage Var_Vreg_out to a load, such a current mirror158 in a PA 159. Like the variable voltage control circuit 144 and thePA 148, the variable voltage elements 154 can be implemented in one ormore integrated circuits and in one or more process technologies. Thiscan provide different regulated voltage levels to the load in responseto the variable voltage control signal. The variable voltage system 150can be implemented in bulk CMOS silicon technology.

The single LDO 152 is an example of the voltage regulator 142 (FIG. 10)and can implement any combination of the functionality described abovewith reference to the voltage regulator 142 or 102 (FIG. 7). Inaddition, the LDO 152 can implement any combination of features of theLDO 112 (FIG. 9), except that the LDO 152 does not include adistribution circuit in the feedback loop to the positive terminal ofthe error amplifier. The single LDO 152 can be used to provide a stablepower supply voltage independent of load impedance, input-voltagevariations, temperature, and time.

The variable voltage element 154 can receive the regulated voltageoutput of the LDO 152 and provide a variable regulated output voltagebased on a variable voltage control input. The variable voltage element154 can include any circuit elements that can provide a variable voltagethat results in a variable quiescent current provided to a load, forexample, the current mirror 158 in PA 159. The variable voltage elementmay include elements that vary resistance. As illustrated, the variablevoltage control element 154 can include a resistive switching networkthat includes a resistor in parallel with a FET. The amount of currentpasses through the FET can change in response to the Variable VoltageControl, thereby adjusting the voltage level of Var_Vreg_Out. In anotherembodiment, the variable voltage control element can be a long channelFET with a variable gate voltage that can implement a variable resistor.In yet another embodiment, the variable voltage control element caninclude two or more relatively weak FETs and use the variable voltagecontrol to provide different voltage levels by selectively turning apredetermined number of the relatively weak transistors “On.”

Thus, in one embodiment, the variable voltage system 150 can createdifferent bias voltages based on the amount of current required in a PAreference current mirror 158. Advantageously, the variable voltagesystem 150 can be implemented in bulk CMOS and the PA 159 can beimplemented in GaAs. Such an implementation can reduce area consumptionand lower cost by allowing the removal of additional elements, such assurface mount devices (SMDs), from the more expensive GaAs substrate.

Distribution of Variable Regulated Voltages

FIG. 12 is a block diagram of a circuit 160 for distributing variable,regulated voltages from a voltage regulator according to one embodiment.The illustrated variable voltage distribution circuit 160 includes asingle voltage regulator 162, a variable voltage distribution circuit164, a control circuit 166, and PAs 168 a-168 n. The illustratedcomponents of the variable voltage distribution circuit 160 canimplement any combination of the distribution and/or variable voltagefunctions described above, for example, in reference to FIGS. 7 and 10.The variable voltage distribution circuit 160 can provide a plurality ofvariable regulated voltages Var_Vreg[1:N] to bias power amplifiers 168a-168 n from the single voltage regulator 162. The voltage distributioncircuit 160 can implement a function to distribute a single inputreference voltage Vref_in to a plurality of variavle regulated voltagesVar_Vreg[1:N] with the variable voltage distribution circuit 164 and thecontrol circuit 166, using any combination of the features describedabove.

FIG. 13 is a block diagram for distributing variable voltages from asingle low-dropout regulator according to one embodiment. Variablevoltage distribution system 170 can include a single LDO 172, one ormore distribution elements 174, one or more variable voltage controlelements 176, and feedback elements 178. The variable voltagedistribution system 170 can implement any combination of featuresdescribed above related to voltage distribution or variable voltagecontrol, for example, in the voltage distribution systems 110A, 1106,110C (FIGS. 8A-8C) or the variable voltage system 150 (FIG. 11). Thevariable voltage distribution system 150 can provide a plurality ofvariable regulated voltages Var_Vreg_out1-Var_Vreg_out6 to variousloads, such as PAs.

Combining voltage distribution and variable voltage control can allowfor distribution of accurate voltages as programmed by a user from thesingle LDO 172. This combination can result in even greater savings indie area, lower current consumption, and reduced design complexitycompared to implementing voltage distribution and voltage variationseparately. In addition, variable voltage distribution can provideadditional flexibility for future architectural changes orfunctionality.

The variable voltage distribution system 150 can provide differentquiescent bias currents based on desired power modes, along withdistributing a single regulated output voltage to different loads byselectively enabling and disabling distribution of regulated voltage tothe different loads. More detail about one example implementation of thevariable voltage distribution system 150 in provided in connection withFIG. 15.

The distribution elements 174 can comprise one or more switches thatpass a regulated voltage to a variable voltage control element 176 whenthe switches are “On.” In one embodiment, there is one switch connectedto each variable voltage control element 176. In another embodiment, oneor more variable voltage control elements 176 can be connected toswitches and one or more variable voltage control elements can beconnected directly to the output of the LDO 172.

As shown in FIG. 13, the distribution elements 174 can be connected tothe output of the LDO 172 and can pass current to the variable voltagecontrol elements 176. The variable voltage control elements can thenadjust the regulated voltages and provide variable regulated voltages toloads, such as PAs. It can be advantageous to include one or more of thedistribution elements 174 in a feedback loop with the LDO 172, which caninclude feedback elements 178. This can compensate for process, supply,and temperature variations that can be introduced by the distributionelements. Thus, variable regulated output voltages can provide regulatedvoltages that can compensate for process, supply, and temperaturevariation.

In another embodiment, the output of the LDO can be connected tovariable voltage control elements. The variable voltage control elementscan then provide variable voltages to distribution elements that canselectively provide variable regulated voltages to loads, such as PAs.In this embodiment, a feedback loop with the LDO can include switchesthat match corresponding switches in the distribution elements, forexample, by being formed on the same integrated circuit with similarlayouts. In this way, the feedback loop take the output of the LDO,before adjustment by the variable voltage control elements, andcompensate for process, supply, and temperature variation.

In addition, a user-defined functionality can be integrated within thefeedback loop to the error amplifier in the LDO, thereby allowing forreduction or minimization of output voltage errors. The user definedfunction can be implemented in digital distribution control signals, forexample. In such an implementation, a highly reliable mixed signalapproach can be implemented to distribute the variable regulatedvoltages, for example, to PA bias inputs.

The variable LDO output voltage function can be outside the compensationloop of the LDO error amplifier. To effectively compensate for process,supply, and temperature variations while minimizing current and areaconsumption, the voltage distribution function can be utilized with thevariable voltage function to distribute an array of variable referencevoltages. In one embodiment, both distribution and variable voltagecontrol functions can offer the flexibility to distribute differentvoltage levels to multiple loads (for example, PA stages) utilizing asingle LDO output reference.

FIG. 14A shows a process 180 of providing a plurality of regulatedvoltages from a single regulated voltage. The process 180 can beperformed in a variety of applications, such as providing an accuratequiescent current for PAs. For example, the plurality of regulatedvoltages provided by the process 180 can be used to bias the PA systemsdescribed above in reference to FIGS. 3A-3B.

At block 182, a reference voltage and a battery voltage are received.The reference voltage can be a constant, known voltage value. Thebattery voltage can be provided by a battery or any other suitable powersupply. The battery voltage can change over time. For example, as abattery discharges, the battery typically provides a lower voltage.

Because the battery voltage can change, it may not be suitable forcertain applications that require a constant voltage. Accordingly, aregulated voltage can be generated at block 184. The regulated voltagecan provide an accurate voltage based at least in part on the referencevoltage and the battery voltage. In one embodiment, the regulatedvoltage can be generated using an operational amplifier with a feedbackloop.

A plurality of regulated voltage can be generated from the regulatedvoltage at block 186. This can provide multiple accurate, regulatedvoltages to circuits that require such voltage signals. Accordingly, asingle voltage regulator can provide multiple loads with regulatedvoltages, saving area, reducing power consumption, and improvingscalability, among other advantages.

The plurality of regulated voltages can selectively be provided to oneor more loads, such as PAs or PA stages, at block 188. In oneembodiment, two or more loads can be provided with regulated voltagesconcurrently. The components used to selectively provide the regulatedvoltages can provide feedback information that can help to keep thegenerated regulated voltage at a stable, accurate value at block 184.The loads can be on either the same die or a different die than thecomponents that create the regulated voltage. Alternatively oradditionally, the loads can be created using either the processtechnology or a different technology than the components that create theregulated voltage.

The plurality of regulated voltages can be selectively provided todifferent loads to enable or disable certain circuit elements at block188. For example, certain loads can be provided with regulated voltagesin certain modes of operation, such as power modes, to generate signalswithin predefined frequency bands, to comply with different standards,and/or to generate signals for certain applications.

FIG. 14B shows a process 190 of providing a variable regulated voltagefrom a single regulated voltage. The process 190 can be performed in avariety of applications, such as providing an accurate quiescent currentfor PAs. For example, different voltage levels provided by the process190 can be used to bias the PA systems described above in reference toFIGS. 3A-3B to different voltages.

The process 190 is similar to the process 180, except that variableregulated voltages are implemented instead of a plurality of regulatedvoltages. Accordingly, blocks 192 and 194 can implement any combinationof the functions described above in reference to blocks 182 and 184.

The regulated voltage generated at block 194 can be controlled using oneor more variable voltage control elements at block 186. This can providemultiple accurate, regulated voltage levels to circuits that can benefitfrom such voltage signals. Accordingly, a single voltage regulator canprovide one or more loads with a variable regulated voltage, instead ofusing separate voltage regulators for each desired voltage level. Thiscan result in saving area, reducing power consumption, and improvingscalability, among other advantages.

The variable regulated voltage can be provided to one or more loads,such as PAs or PA stages, at block 198. The variable regulated voltagecan be provided to loads to adjust the amount of quiescent currentprovided. For example, the loads can be provided with different voltagesin certain modes of operation, such as power modes, to comply withdifferent standards, and/or to generate signals for certainapplications. The loads can be on either the same die or a different diethan the components that create the regulated voltage. Alternatively oradditionally, the loads can be created using either the processtechnology or a different technology than the components that create theregulated voltage.

FIG. 14C shows a process 200 of providing a plurality of variableregulated voltages from a single regulated voltage. The process 200 canimplement any combination of features described earlier in reference tothe processes 180, 190. The process 200 can include: receiving areference voltage and a battery voltage at block 202; generating aregulated voltage at block 204; generating a plurality of regulatedvoltages from a single regulated voltage at block 206; controlling oneor more regulated voltages with a variable voltage control element(s) atblock 208; and providing one or more variable regulated voltages topower amplifier(s) at block 210.

FIG. 15 illustrates an electronic system 220 that includes a variablevoltage distribution function according to one embodiment. Theelectronic system 220 illustrates how bias control circuits canselectively provide PAs with variable regulated voltages from a singleLDO according to one embodiment. The electronic system 220 can implementlow band and/or high band functionality, in addition to operating inthree different power modes (low power, medium power, and high power).

The voltage regulator 222 can receive a reference voltage Vref_in, apower supply voltage Vbatt, and a feedback signal Vfb from a variablevoltage distribution circuit 204. From the received signals, the voltageregulator 222 can provide the variable voltage distribution circuit 204with a regulated voltage Vreg. The control 206 can selectively controlthe regulated voltages that the variable voltage distribution circuit204 can provide to bias inputs of one or more PA stages 208 a, 208 b,212 a, 212 b, 216 a, 216 b, 220 a, 220 b. With the control 206 and thevariable voltage distribution circuit 204, the electronic system canprovide high band and/or low band signals and operate at a low, medium,or high power mode.

Table 2 provides one example implementation of multiple power modes andoperation for multiple frequency bands. When PA stages are not providedwith regulated voltages, their respective input nodes can discharge.Current mirrors, or similar circuit elements, can then bring the currentinside the PA close to zero as the input discharges.

TABLE 2 PA Stages Receiving a Variable Voltage Band, Mode RegulatedVoltage (FIG. 15) Level High Band, High Power 208a, 208b High High Band,Medium Power 212a, 212b Medium High Band, Low Power 212a Low Low Band,High Power 216a, 216b High Low Band, Medium Power 220a, 220b Medium LowBand, Low Power 220a Low

As shown in Table 2, only PA stages 208 a, 208 b, 212 a, 212 b for thehigh band data path can be provided with regulated voltages in high bandmode. Similarly, only PA stages 216 a, 216 b, 220 a, 220 b for the lowband data path can be provided with regulated voltages in low band mode.In one embodiment, the variable voltage distribution 204 can beimplemented on an integrated circuit with pins for VregH_High,VregH_Med, VregH_Low on a first side and pins for VregL_High, VregL_Med,VregL_Low on an opposing side. This can provide for shorter routing,reduced area, and reduced power consumption. For example, the high banddata path can be placed near the first side and the low band data pathcan be place near the opposing side.

As also shown in Table 2, certain power amplifiers within each data pathcan receive regulated voltages depending on the power mode. For example,in high band, high power operation, a regulated voltage VregH_High witha High voltage level can be provided to a bias input in PA stages 208 a,208 b. In addition, certain PA stages can be provided with regulatedvoltages during more than one power mode of operation. These PA stagescan receive different voltage levels based on the power mode. Forexample, PA stages 212 a, 220 a can receive a regulated voltageVregH_Low, VregL_Low, respectively, in both medium power mode and lowpower mode when their respective bands are enabled. Variable voltageelements in the variable voltage distribution circuit 204 can adjust theregulated voltage Vreg provided by the voltage regulator 222 to a Mediumlevel for medium power mode and a Low level for low power mode. This canallow the PA stages 212 a, 220 a to be used in both low and medium powermodes, saving additional area and power. In low power mode, only one PAstage 212 a, 220 a can be used. When the state of a switch 224, 226 ischanged, then the one PA stage 212 a, 220 a can be coupled to a secondPA stage 212 b, 220 b for operation in medium power mode using bothstages.

Voltage levels provided to PA stages can change based on the power mode.For example, a different voltage level can be implemented for each powermode. The particular voltage levels can be based on industryspecifications and/or standards, for example. One or more of the high,medium and/or low voltage levels can be different between the low banddata path and the high band data path. Alternatively or additionally,one or more of the high, medium and/or low voltage levels can be thesame in the low band data path and the high band data path.

Applications

Some of the embodiments described above have provided examples inconnection with wireless devices and/or mobile phones. However, theprinciples and advantages of the embodiments can be used for any othersystems or apparatus that have needs for distribution and/or variationof regulated voltage(s).

Such voltage regulation systems can be implemented in various electronicdevices. Examples of the electronic devices can include, but are notlimited to, consumer electronic products, parts of the consumerelectronic products, electronic test equipment, etc. Examples of theelectronic devices can also include, but are not limited to, memorychips, memory modules, circuits of optical networks or othercommunication networks, and disk driver circuits. The consumerelectronic products can include, but are not limited to, a mobile phone,a telephone, a television, a computer monitor, a computer, a hand-heldcomputer, a personal digital assistant (PDA), a microwave, arefrigerator, an automobile, a stereo system, a cassette recorder orplayer, a DVD player, a CD player, a VCR, an MP3 player, a radio, acamcorder, a camera, a digital camera, a portable memory chip, a washer,a dryer, a washer/dryer, a copier, a facsimile machine, a scanner, amulti functional peripheral device, a wrist watch, a clock, etc.Further, the electronic devices can include unfinished products.

CONCLUSION

Unless the context clearly requires otherwise, throughout thedescription and the claims, the words “comprise,” “comprising,” and thelike are to be construed in an inclusive sense, as opposed to anexclusive or exhaustive sense; that is to say, in the sense of“including, but not limited to.” The words “coupled” or connected”, asgenerally used herein, refer to two or more elements that may be eitherdirectly connected, or connected by way of one or more intermediateelements. Additionally, the words “herein,” “above,” “below,” and wordsof similar import, when used in this application, shall refer to thisapplication as a whole and not to any particular portions of thisapplication. Where the context permits, words in the above DetailedDescription using the singular or plural number may also include theplural or singular number respectively. The word “or” in reference to alist of two or more items, that word covers all of the followinginterpretations of the word: any of the items in the list, all of theitems in the list, and any combination of the items in the list.

Moreover, conditional language used herein, such as, among others,“can,” “could,” “might,” “can,” “e.g.,” “for example,” “such as” and thelike, unless specifically stated otherwise, or otherwise understoodwithin the context as used, is generally intended to convey that certainembodiments include, while other embodiments do not include, certainfeatures, elements and/or states. Thus, such conditional language is notgenerally intended to imply that features, elements and/or states are inany way required for one or more embodiments or that one or moreembodiments necessarily include logic for deciding, with or withoutauthor input or prompting, whether these features, elements and/orstates are included or are to be performed in any particular embodiment.

The above detailed description of embodiments of the invention is notintended to be exhaustive or to limit the invention to the precise formdisclosed above. While specific embodiments of, and examples for, theinvention are described above for illustrative purposes, variousequivalent modifications are possible within the scope of the invention,as those skilled in the relevant art will recognize. For example, whileprocesses or blocks are presented in a given order, alternativeembodiments may perform routines having steps, or employ systems havingblocks, in a different order, and some processes or blocks may bedeleted, moved, added, subdivided, combined, and/or modified. Each ofthese processes or blocks may be implemented in a variety of differentways. Also, while processes or blocks are at times shown as beingperformed in series, these processes or blocks may instead be performedin parallel, or may be performed at different times.

The teachings of the invention provided herein can be applied to othersystems, not necessarily the system described above. The elements andacts of the various embodiments described above can be combined toprovide further embodiments.

While certain embodiments of the inventions have been described, theseembodiments have been presented by way of example only, and are notintended to limit the scope of the disclosure. Indeed, the novel methodsand systems described herein may be embodied in a variety of otherforms; furthermore, various omissions, substitutions and changes in theform of the methods and systems described herein may be made withoutdeparting from the spirit of the disclosure. The accompanying claims andtheir equivalents are intended to cover such forms or modifications aswould fall within the scope and spirit of the disclosure.

1. An apparatus comprising: a voltage regulator configured to receive areference voltage, a feedback signal, and a power supply voltage, and togenerate based at least in part on the received voltages a regulatedvoltage; and a voltage distribution circuit configured to receive theregulated voltage from the voltage regulator and to generate a pluralityof regulated voltages voltage in response to one or more distributioncontrol signals.
 2. The apparatus of claim 1, wherein the voltageregulator comprises a low-dropout regulator.
 3. The apparatus of claim1, wherein the voltage distribution circuit comprises a transmissiongate voltage distribution network.
 4. The apparatus of claim 1, whereinthe voltage distribution circuit comprises a transmission gate voltagedistribution network.
 5. The apparatus of claim 1, wherein one or moreof the plurality of regulated voltages are electrically connected to oneor more power amplifier bias reference input nodes.
 6. The apparatus ofclaim 1, wherein the voltage distribution circuit includes one or moresilicon complementary metal oxide semiconductor circuit elements and atleast one of the one or more power amplifiers includes a differentprocess technology.
 7. The apparatus of claim 1, wherein the one or morevoltage distribution control signals can represent a plurality of powermodes.
 8. The apparatus of claim 1, wherein the feedback signal isprovided by a feedback loop that includes the distribution circuit. 9.The apparatus of claim 1, wherein the apparatus comprises a mobiledevice.
 10. A method comprising: receiving a reference voltage and apower supply voltage; generating a regulated voltage based at least inpart on the reference voltage and the power supply voltage; andgenerating a plurality of regulated voltages from the reference voltageusing a voltage distribution circuit.
 11. The method of claim 10,further comprising providing one or more regulated voltages to one ormore power amplifiers.
 12. The method of claim 11, wherein a first dieincludes at least a portion of the voltage distribution circuit and asecond die includes at least one of the one or more power amplifiers.13. The method of claim 12, wherein the first die and the second die areformed using different process technologies.
 14. The method of claim 10,wherein generating the regulated voltage is based on a feedback signalprovided by the voltage distribution circuit.
 15. The method of claim10, wherein two or more of the plurality of regulated voltages aregenerated concurrently.
 16. The method of claim 10, further comprisingreceiving one or more voltage distribution control signals and using atleast one of the one or more voltage distribution control signals toselectively provide variable regulated voltages to different loads basedon power modes of the loads.
 17. The method of claim 10, furthercomprising receiving one or more voltage distribution control signalsand using at least one of the one or more voltage distribution controlsignals to selectively provide variable regulated voltages to loads indata paths configured to generate signals in different frequency bands.18. An apparatus comprising: means for generating a regulated voltagebased on a reference voltage, a feedback signal, and a power supplyvoltage; and means for generating a plurality of regulated voltages andthe feedback signal based on the regulated voltage.
 19. Acomputer-readable storage medium comprising instructions that whenexecuted perform a method of: receiving a reference voltage and a powersupply voltage; generating a regulated voltage based at least in part onthe reference voltage, the power supply voltage, and a feedback loopthat includes at least a portion of a voltage distribution circuit; andgenerating a plurality of regulated voltages from the reference voltageusing the voltage distribution circuit.